Temporal Deductive Verification of Basic ASM Models

Abstract State Machines (ASMs, for short) provide a practical new computational model which has been applied in the area of software engineering for systems design and analysis. However, reasoning about ASM models occurs, not within a formal deductive system, but basically in the classical informal proofs style of mathematics. Several formal verification approaches for proving correctness of ASM models have been investigated. In this paper we consider the use of the TLAlogic for the deductive verification of a certain class of ASMs, namely basic ASMs which have successfully been applied in describing the dynamic behavior of systems at various levels of abstraction. In particular, we base our verification purpose on a translation of basic ASMs to the Temporal Logic of Actions (TLA) used as a formal basis to formally specify and reason about temporal behaviors of basic ASM models. The temporal deductive approach is illustrated by the formal correctness proof of a producer-consumer system formalized in terms of basic ASMs.